Bolol4002/Fault_Tolerant_ADC — reverse-engineered prompt

Build me a QSPICE project for a fault tolerant ADC meant for an edge IoT device. I want the main pieces to be an ideal comparator block, a priority encoder that turns comparator outputs into a 3 bit digital result, and a fault detection block that checks the reference voltage before it reaches the resistor ladder.

The fault block should only allow the reference through when it is in the safe 7V to 9V range. If it goes outside that range, it should block the signal and raise a clear error flag. Please wire everything into a complete ADC design and include simulation setups that show normal operation and fault conditions, so I can see the digital output change and the error flag trigger.

Make the schematics clean and reusable, with separate subcircuits or symbols for each block. If possible, also add a short explanation of how each part works and what to test in QSPICE. You can look up current QSPICE syntax online if needed.