markus-k/rv32-soc — reverse-engineered prompt

Build me a simple RISC V system on chip for the Mojo V3 Spartan 6 FPGA, using the PicoRV32 core as the CPU. I want it to be a small, understandable design with the basic peripherals you would expect so I can load it on the board and experiment with it. Please include memory, GPIO, UART, and SPI, and make sure the top level is ready for the target board.

Also include a tiny firmware example that boots and does something obvious, like sending a message over serial and exercising the GPIO and SPI in a basic way. If there are already simulation tests, keep them working and add anything important that is missing so it is easy to verify before trying real hardware. I care more about something clean and easy to tweak than something fancy. If you need details for the board or the CPU core, look up the current docs online.